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Architecture for dense matrix multiplication on a high-performance reconfigurable system.
Viviane Lucy Santos de Souza
Victor Wanderley Costa de Medeiros
Manoel Eusebio de Lima
Published in:
SBCCI (2009)
Keyphrases
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matrix multiplication
distributed memory
hardware implementation
parallel architecture
low cost
computation intensive
systolic array
real time
dynamic reconfiguration
computer vision
image processing
case study
message passing
heterogeneous computing