A fully flexible circuit implementation of clique-based neural networks in 65-nm CMOS.
Benoit LarrasPaul CholletCyril LahuecFabrice SeguinMatthieu ArzelPublished in: ISCAS (2018)
Keyphrases
- cmos technology
- circuit design
- neural network
- low power
- high speed
- low voltage
- power consumption
- analog vlsi
- delay insensitive
- fuzzy logic
- power dissipation
- vlsi circuits
- parallel processing
- artificial neural networks
- pattern recognition
- efficient implementation
- neural network model
- metal oxide semiconductor
- back propagation
- nm technology
- mixed signal
- silicon on insulator
- self organizing maps
- low cost
- genetic algorithm