Reduced complexity, FPGA implementation of quasi-cyclic LDPC decoder.
Christian SpagnolWilliam P. MarnaneEmanuel M. PopoviciPublished in: ECCTD (2005)
Keyphrases
- fpga implementation
- reduced complexity
- hardware implementation
- vector quantization
- ldpc codes
- low density parity check
- field programmable gate array
- image processing algorithms
- channel coding
- motion estimation algorithm
- distributed source coding
- error correction
- distributed video coding
- transfer function
- image compression
- decoding algorithm
- real time