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High-Speed and Unified ECC Processor for Generic Weierstrass Curves over GF(p) on FPGA.
Asep Muhamad Awaludin
Harashta Tatimma Larasati
Howon Kim
Published in:
IACR Cryptol. ePrint Arch. (2022)
Keyphrases
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high speed
low power
real time
data acquisition
error correction
high speed networks
general purpose
b spline
frame rate
endpoints
single chip
image processing
parallel processing
hardware implementation