Exploiting Box Expansion and Grid Partitioning for Parallel FPGA Routing.
Minghua ShenGuojie LuoNong XiaoPublished in: FCCM (2018)
Keyphrases
- parallel hardware
- load balance
- parallel processing
- parallel architecture
- routing protocol
- data partitioning
- hardware implementation
- real time image processing
- real time
- field programmable gate array
- pipelined architecture
- routing problem
- parallel implementation
- shortest path
- signal processing
- network topology
- routing algorithm
- inter domain
- systolic array
- low cost
- hardware design
- network topologies
- ad hoc networks
- hardware architecture
- end to end
- interconnection networks