Model checking partial software product line designs.
Yufeng ShiOu WeiYu ZhouPublished in: InnoSWDev@SIGSOFT FSE (2014)
Keyphrases
- model checking
- software product line
- temporal logic
- product line
- software engineering
- future directions
- life cycle
- formal verification
- formal specification
- temporal properties
- model checker
- finite state
- automated verification
- verification method
- software development
- finite state machines
- symbolic model checking
- partial order reduction
- pspace complete
- formal methods
- computation tree logic
- epistemic logic
- process algebra
- timed automata
- reachability analysis
- concurrent systems
- asynchronous circuits
- reactive systems
- bounded model checking
- satisfiability problem
- error rate
- transition systems
- ctl model update