A Pipelined and Scalable Dataflow Implementation of Convolutional Neural Networks on FPGA.
Marco BacisGiuseppe NataleEmanuele Del SozzoMarco Domenico SantambrogioPublished in: IPDPS Workshops (2017)
Keyphrases
- convolutional neural networks
- hardware implementation
- data flow
- parallel architecture
- low cost
- design methodology
- high speed
- hardware design
- multiscale
- convolutional network
- dedicated hardware
- fpga implementation
- software implementation
- highly scalable
- database machine
- real time image processing
- implementation details
- fpga device
- hardware architectures
- shape model
- real time
- fpga hardware