Sign in
A 58.3-to-65.4 GHz 34.2 mW sub-harmonically injection-locked PLL with a sub-sampling phase detection.
Teerachot Siriburanon
Tomohiro Ueno
Kento Kimura
Satoshi Kondo
Wei Deng
Kenichi Okada
Akira Matsuzawa
Published in:
ASP-DAC (2015)
Keyphrases
</>
power consumption
detection algorithm
detection rate
automatic detection
object detection
false alarms
detection accuracy
detection method
sample size
event detection
data sets
neural network
high speed
parameter space
random sampling