Applicability of power-gating strategies for aging mitigation of CMOS logic paths.

Navid Khoshavi Rizwan A. Ashraf Ronald F. DeMara

Published in: MWSCAS (2014)

Keyphrases

power consumption
chip design
delay insensitive
low cost
classical logic
low power
logic programming
multi valued
power dissipation
deontic logic
high speed
real world
online auctions
image sensor
data sets
power supply
power management
age estimation
asynchronous circuits
age related