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Methodology Verification of Hierarchically Described VLSI Circuits.

Issac L. BainLance A. Glasser
Published in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (1987)
Keyphrases
  • vlsi circuits
  • low power
  • model checking
  • real time
  • high speed
  • hierarchical structure
  • power consumption
  • signature verification