A Novel Low Power Low Phase-Noise PLL Architecture for Wireless Transceivers.
Amr N. HafezMohamed I. ElmasryPublished in: Great Lakes Symposium on VLSI (1999)
Keyphrases
- low power
- vlsi architecture
- wireless transmission
- low cost
- high speed
- power consumption
- low power consumption
- ultra low power
- cmos technology
- high power
- single chip
- mixed signal
- real time
- nm technology
- digital signal processing
- wireless communication
- wireless networks
- signal processor
- logic circuits
- vlsi circuits
- power reduction
- cmos image sensor
- energy consumption
- gate array
- data flow
- cross layer
- image sensor
- image processing algorithms