Cost-Effective Hardware Sharing Architectures of Fast 8×8 and 4×4 Integer Transforms for H.264/AVC.
Chih-Peng FanPublished in: APCCAS (2006)
Keyphrases
- cost effective
- low cost
- hardware and software
- cost effectiveness
- reversible integer
- real time
- parallel architectures
- information sharing
- video streams
- lossless image compression
- bit rate
- hardware implementation
- embedded systems
- low complexity
- multi core processors
- real time embedded
- rate distortion
- computational complexity
- decoding process
- memory management
- video codec
- coding efficiency
- rate control
- bitstream
- compressed domain
- low power
- evolvable hardware
- data center
- image coding
- video coding
- massively parallel
- floating point
- macroblock
- memory hierarchy
- integer arithmetic