Hypervisor mechanisms to manage FPGA reconfigurable accelerators.
Tian XiaJean-Christophe PrévotetFabienne NouvelPublished in: FPT (2016)
Keyphrases
- field programmable gate array
- hardware implementation
- embedded systems
- parallel computing
- image processing algorithms
- computing systems
- hardware architecture
- fpga implementation
- hardware design
- low cost
- reconfigurable hardware
- single chip
- systolic array
- digital signal
- software implementation
- operating system
- virtual machine
- massively parallel
- general purpose processors
- xilinx virtex
- reconfigurable architecture
- fpga technology
- hardware software co design
- dedicated hardware
- real time image processing
- processing elements
- cloud computing
- signal processing