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A 40nm 16-core 128-thread CMT SPARC SoC processor.

Jinuk Luke ShinKenway W. TamDawei HuangBruce PetrickHa PhamChangku HwangHongping Penny LiAlan P. SmithTimothy JohnsonFrancis SchumacherDavid GreenhillAna Sonia LeonAllan Strong
Published in: ISSCC (2010)
Keyphrases
  • high speed
  • low power
  • parallel processing
  • multiprocessor systems
  • database
  • information systems
  • input output
  • hardware and software
  • computer architecture
  • instruction set