STT-MRAM for Low Power Access for Read-Intensive Parallel Deep-Learning Architectures.
Saranyu ChattopadhyayKaustav BrahmaArkaprova RayMrigank SharadPublished in: iNIS (2017)
Keyphrases
- low power
- deep learning
- power consumption
- low cost
- high speed
- unsupervised feature learning
- machine learning
- unsupervised learning
- design considerations
- mental models
- single chip
- access control
- low power consumption
- digital signal processing
- logic circuits
- shared memory
- gate array
- image sensor
- object recognition
- weakly supervised
- higher order
- pattern recognition
- image segmentation