FPGA implementation of FIR filter using M-bit parallel distributed arithmetic.
Shiann Shiun JengHsing-Chen LinShu-Ming ChangPublished in: ISCAS (2006)
Keyphrases
- fpga implementation
- parallel distributed
- fir filters
- hardware implementation
- finite impulse response
- frequency response
- filter design
- filter bank
- impulse response
- field programmable gate array
- lifting scheme
- linear algebra
- wavelet filters
- real time
- transfer function
- efficient implementation
- island model
- image processing algorithms
- standard deviation
- image enhancement
- image compression