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A 90-nm CMOS 5-GHz Ring-Oscillator PLL With Delay-Discriminator-Based Active Phase-Noise Cancellation.

Seungkee MinTino CopaniSayfe KiaeiBertan Bakkaloglu
Published in: IEEE J. Solid State Circuits (2013)
Keyphrases
  • high speed
  • cmos technology
  • power consumption
  • low power
  • clock frequency
  • power dissipation
  • silicon on insulator
  • limit cycle
  • analog vlsi
  • low cost
  • circuit design
  • power supply
  • vlsi circuits
  • nm technology
  • steady state