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Iterative Search for Reconfigurable Accelerator Blocks With a Compiler in the Loop.
Max Willsey
Vincent T. Lee
Alvin Cheung
Rastislav Bodík
Luis Ceze
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2019)
Keyphrases
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iterative search
field programmable gate array
general purpose
relevance feedback
genetic algorithm
compute intensive
hardware implementation
programming language
low cost
distributed memory machines
iterative process
parallel implementation
embedded systems
reconfigurable architecture
highly optimized
instruction scheduling
multi objective evolutionary
image blocks
feature selection
computing systems
fine grain
parallel programming
dct coefficients
data mining
software systems
software engineering
object oriented
prior knowledge
information retrieval