Design and implementation of a low power spike detection processor for 128-channel spike sorting microsystem.
Tsung-Chuan MaTung-Chien ChenLiang-Gee ChenPublished in: ICASSP (2014)
Keyphrases
- low power
- single chip
- vlsi architecture
- high speed
- gate array
- low cost
- cmos technology
- power consumption
- low power consumption
- ultra low power
- logic circuits
- wireless transmission
- digital signal processing
- signal processor
- vlsi implementation
- power dissipation
- parallel processing
- mixed signal
- design process
- power reduction
- real time
- circuit design
- vlsi circuits
- low density parity check
- cmos image sensor
- hardware and software
- nm technology
- analog to digital converter
- design methodology