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A Differential Flip-Flop With Static Contention-Free Characteristics in 28 nm for Low-Voltage, Low-Power Applications.
Gicheol Shin
Eunyoung Lee
Jongmin Lee
Yongmin Lee
Yoonmyung Lee
Published in:
IEEE J. Solid State Circuits (2023)
Keyphrases
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cmos technology
low power
flip flops
low voltage
power consumption
low cost
high speed
power dissipation
power line
parallel processing
image sensor
mixed signal
logic circuits
digital signal processing
pattern recognition
power reduction