Efficient High Speed Implementation of Secure Hash Algorithm-3 on Virtex-5 FPGA.
Muzaffar RaoThomas NeweIan Andrew GroutPublished in: DSD (2014)
Keyphrases
- hardware implementation
- high speed
- preprocessing
- detection algorithm
- learning algorithm
- optimization algorithm
- computational cost
- dynamic programming
- single pass
- parallel implementation
- computational complexity
- real time
- highly efficient
- objective function
- software implementation
- fpga implementation
- matching algorithm
- computationally efficient
- worst case
- probabilistic model
- cost function
- segmentation algorithm
- tree structure
- particle swarm optimization
- efficient implementation
- low power
- signal processing
- simulated annealing
- high efficiency
- k means
- hashing algorithm