Improved design debugging architecture using low power serial communication protocols for signal processing applications.
A. MuraliHari Kishore KakarlaG. M. Anitha PriyadarshiniPublished in: Int. J. Speech Technol. (2021)
Keyphrases
- low power
- vlsi architecture
- communication protocols
- signal processing
- digital signal processing
- single chip
- cmos technology
- power consumption
- low cost
- high speed
- low power consumption
- logic circuits
- mixed signal
- signal processor
- nm technology
- vlsi circuits
- vlsi implementation
- power reduction
- cmos image sensor
- gate array
- design considerations
- communication networks
- design process
- communication protocol
- high power
- low complexity
- real time
- design methodology
- data flow
- multi channel
- pattern recognition
- analog to digital converter