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A Highly Efficient and Linear mm-Wave CMOS Power Amplifier Using a Compact Symmetrical Parallel-Parallel Power Combiner With IMD3 Cancellation for 5G Applications.
Hyunjin Ahn
Kyutaek Oh
Ilku Nam
Ockgoo Lee
Published in:
IEEE Access (2021)
Keyphrases
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highly efficient
power consumption
multithreading
high power
low cost
parallel processing
parallel implementation
computer architecture
distributed memory
evolutionary algorithm
low latency
power management