HARDWARE ACCELERATOR: IMPLEMENTATION OF CNN ON FPGA FOR DIGIT RECOGNITION.
Onkar ChoudhariMarisha ChopadeSourabh ChopdeSwarali DabhadkarV. IngalePublished in: VDAT (2020)
Keyphrases
- field programmable gate array
- digit recognition
- hardware implementation
- hardware architecture
- fpga technology
- software implementation
- dedicated hardware
- reconfigurable hardware
- fpga implementation
- hardware design
- xilinx virtex
- hardware architectures
- low cost
- real time
- embedded systems
- fpga device
- hardware software co design
- parallel implementation
- efficient implementation
- fpga hardware
- parallel architecture
- hardware description language
- hardware and software
- parallel computing
- parallel hardware
- audio visual
- single chip
- noisy environments
- general purpose processors
- hand written
- hardware software
- image processing algorithms
- signal processing
- multiscale
- graphics processing units
- support vector machine