Fast-Converging and Low-Power LDPC Decoding: Algorithm, Architecture, and VLSI Implementation.

Saleh Usman Mohammad M. Mansour

Published in: J. Signal Process. Syst. (2021)

Keyphrases

vlsi architecture
low density parity check
vlsi implementation
low power
decoding algorithm
ldpc codes
power consumption
low cost
high speed
low complexity
real time
error correction
computational complexity
channel coding
spatial domain
filter bank
multiresolution