Enabling ultra low voltage system operation by tolerating on-chip cache failures.

Amin Ansari Shuguang Feng Shantanu Gupta Scott A. Mahlke

Published in: ISLPED (2009)

Keyphrases

low voltage
random access memory
cmos technology
high speed
design considerations
power line
mixed signal
low power
multithreading
silicon on insulator
power management
power consumption
parallel processing
processor core
memory subsystem
low cost
real time
frame rate
power dissipation
prefetching