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Power-efficient dual-edge implicit pulse-triggered flip-flop with an embedded clock-gating scheme.
Liang Geng
Jizhong Shen
Congyuan Xu
Published in:
Frontiers Inf. Technol. Electron. Eng. (2016)
Keyphrases
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power dissipation
power consumption
flip flops
efficient implementation
embedded systems
pattern matching
low power
memory efficient
digital signal processing
power reduction