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A Seamless-Controlled Digital PLL Using Dual Loops for High Speed SoCs.

Young San ShinJae-Kyung WeeJong-Chan HaJi-Hoon LimYong-Ju KimYoung-Sang Son
Published in: J. Circuits Syst. Comput. (2011)
Keyphrases
  • high speed
  • low power
  • real time
  • data mining
  • context awareness
  • data sets
  • databases
  • neural network
  • information retrieval
  • search engine
  • information systems
  • primal dual
  • circuit design
  • digital straight line