NoC-DPR: A new simulation tool exploiting the Dynamic Partial Reconfiguration (DPR) on Network-on-Chip (NoC) based FPGA.
Amr HassanHassan MostafaHossam A. H. FahmyPublished in: Integr. (2018)
Keyphrases
- network on chip
- simulation tool
- routing algorithm
- network simulator
- field programmable gate array
- multi processor
- simulation tools
- packet switched
- data transfer
- simulation environment
- simulation model
- low cost
- hardware implementation
- embedded systems
- human computer
- interconnection networks
- routing protocol
- shortest path
- wireless sensor networks
- image processing
- power dissipation
- network traffic
- end to end