A reconfigurable macro-pipelined systolic accelerator architecture.
Wenqi BaoJiang JiangYuzhuo FuQing SunPublished in: FPT (2011)
Keyphrases
- systolic array
- parallel architecture
- data flow
- reconfigurable architecture
- hardware implementation
- parallel implementation
- management system
- low cost
- field programmable gate array
- data sets
- general purpose
- multi agent
- parallel processing
- distributed architecture
- compute intensive
- heterogeneous computing
- database
- functional units
- shared memory
- query processing
- real time