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A parallel structure for CMOS four-quadrant analog multipliers and its application to a 2-GHz RF downconversion mixer.
Shuo-Yuan Hsiao
Chung-Yu Wu
Published in:
IEEE J. Solid State Circuits (1998)
Keyphrases
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analog vlsi
high speed
circuit design
signal processing
frequency band
neural network
infrared
power consumption
network structure
parallel implementation
focal plane