A 1.8V 10b 210MS/s CMOS Pipelined ADC Featuring 86dB SFDR without Calibration.

J. Li Robert Leboeuf Matthew Courcy Gabriele Manganaro

Published in: CICC (2007)

Keyphrases

small animal
analog to digital converter
high speed
low cost
power consumption
single chip
low power
power supply
vlsi circuits
database
circuit design
data flow
image sensor
camera network
delay insensitive