RTL Implementations and FPGA Benchmarking of Three Authenticated Ciphers Competing in CAESAR Round Two.
William DiehlKris GajPublished in: DSD (2016)
Keyphrases
- hardware architectures
- block cipher
- software implementation
- hardware description language
- hardware implementation
- hardware design
- low cost
- high speed
- fpga implementation
- model based diagnosis
- verilog hdl
- hash functions
- efficient implementation
- single chip
- computational power
- key exchange protocol
- signal processing
- real time
- s box
- key agreement protocol
- reconfigurable hardware
- systolic array
- general purpose processors