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Fast Parallel-Prefix Architectures for Modulo 2n-1 Addition with a Single Representation of Zero.
Riyaz A. Patel
Mohammed Benaissa
Said Boussakta
Published in:
IEEE Trans. Computers (2007)
Keyphrases
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parallel processing
data structure
databases
evolutionary algorithm
representation scheme
neural network
real world
website
multiresolution
image representation
multi core processors