Optimised reconfigurable MAC processor architecture.
Marios IliopoulosTheodore AntonakopoulosPublished in: ICECS (2001)
Keyphrases
- systolic array
- computation intensive
- parallel architecture
- functional units
- instruction set
- reconfigurable architecture
- data flow
- management system
- multi processor
- hardware implementation
- real time
- industry standard
- dynamic reconfiguration
- general purpose
- high speed
- low cost
- heterogeneous computing
- digital signal
- associative memory
- memory hierarchy
- software architecture
- general purpose processors