A 77 GHz Power Amplifier Design with in-Phase Power Combing for 20 dBm Psat in a 40-nm CMOS Technology.
Guanglai WuYi ZhangLin HeDiyang GaoYang LiuYufeng GuoHao GaoPublished in: ISCAS (2021)
Keyphrases
- cmos technology
- power consumption
- power dissipation
- low power
- high power
- clock gating
- silicon on insulator
- power management
- high speed
- low voltage
- parallel processing
- spl times
- power reduction
- single chip
- ibm power processor
- low cost
- clock frequency
- mixed signal
- image sequences
- finite state machines
- pattern recognition
- digital signal processing
- design methodology
- design process
- computer vision