Dual-mode floating-point multiplier architectures with parallel operations.

Ahmet Akkas Michael J. Schulte

Published in: J. Syst. Archit. (2006)

Keyphrases

floating point
floating point arithmetic
fixed point
square root
instruction set
multi core processors
processing units
memory bandwidth
dynamic programming
low cost
graphical models
data processing
post processing
fast fourier transform
processing elements
interval arithmetic