Model Checking Programmable Router Configurations.
Luca ZanolinCecilia MascoloWolfgang EmmerichPublished in: Graph Transformations and Model-Driven Engineering (2010)
Keyphrases
- model checking
- temporal logic
- formal verification
- formal specification
- model checker
- finite state
- partial order reduction
- temporal properties
- verification method
- timed automata
- bounded model checking
- reachability analysis
- symbolic model checking
- finite state machines
- pspace complete
- computation tree logic
- transition systems
- automated verification
- epistemic logic
- concurrent systems
- process algebra
- formal methods
- deterministic finite automaton
- artificial intelligence