Efficient Simulation for Hardware Model Checking.
Joseph TafeseArie GurfinkelPublished in: LPAR (2024)
Keyphrases
- model checking
- temporal logic
- automated verification
- finite state
- verification method
- symbolic model checking
- formal verification
- formal specification
- concurrent systems
- timed automata
- reachability analysis
- computation tree logic
- partial order reduction
- epistemic logic
- temporal properties
- formal methods
- bounded model checking
- finite state machines
- model checker
- transition systems
- asynchronous circuits
- process algebra