low-power A/D-converter cell for 10b 10MS/s operation.

David Muthers Reinhard Tielert

Published in: ESSCIRC (2004)

Keyphrases

low power
low cost
power consumption
high speed
single chip
high power
vlsi architecture
wireless transmission
low power consumption
logic circuits
vlsi circuits
digital signal processing
power reduction
cmos technology
mixed signal
delay insensitive
power management
image sensor
ultra low power