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Efficient parallel architecture for a real-time UHD scalable HEVC encoder.

Ronan ParoisWassim HamidoucheJérôme ViéronMickaël RauletOlivier Déforges
Published in: EUSIPCO (2017)
Keyphrases
  • real time
  • parallel architecture
  • video codec
  • systolic array
  • synthetic aperture sonar
  • hardware implementation
  • graph cuts
  • rate distortion
  • data flow
  • parallel implementation
  • variable block size motion estimation