Low power switched-current circuits with low sensitivity to the rise/fall time of the clock.
Radek RudnickiMarek KropidlowskiAndrzej HandkiewiczPublished in: Int. J. Circuit Theory Appl. (2010)
Keyphrases
- low power
- high speed
- power consumption
- logic circuits
- vlsi circuits
- cmos technology
- low power consumption
- power reduction
- delay insensitive
- low cost
- power dissipation
- mixed signal
- single chip
- wide dynamic range
- wireless transmission
- high power
- low voltage
- real time
- gate array
- vlsi architecture
- power saving
- energy consumption
- motion estimation