Login / Signup
A router architecture with dual input and dual output channels for Networks-on-Chip.
Wu Zhou
Yiming Ouyang
Yingchun Lu
Huaguo Liang
Published in:
Microprocess. Microsystems (2022)
Keyphrases
</>
low cost
input data
multiple output
management system
high speed
network on chip
network structure
hardware implementation
primal dual
vlsi implementation
packet switching