High performance multiplier-less pipelined FPGA architecture for 2-D non-separable quaternionic filter banks.
Eugene V. RybenkovNick A. PetrovskyPublished in: SPA (2020)
Keyphrases
- filter bank
- hardware implementation
- parallel architecture
- signal processing
- wavelet filter banks
- image coding
- subband
- hardware architecture
- perfect reconstruction
- multiscale
- frequency domain
- lifting scheme
- fourier transform
- multiresolution
- data flow
- computationally efficient
- field programmable gate array
- subband coding
- wavelet packet
- synthesis filters
- image coding scheme
- reconstruction error
- lapped transforms
- discrete cosine transform
- wavelet transform
- denoising
- wavelet coefficients
- neural network
- multiscale decomposition
- wavelet filters
- floating point
- spatial domain
- maximum likelihood
- pattern recognition
- computer vision