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An effective output-oriented algorithm for low power multipartition architecture.

Shanq-Jang RuanJen-Chiun LinPo-Hung ChenFeipei LaiKun-Lin TsaiChung-Wei Yu
Published in: ICECS (2000)
Keyphrases
  • low power
  • computational complexity
  • vlsi architecture
  • high speed
  • power consumption
  • low cost
  • real time
  • hardware implementation
  • image processing algorithms
  • motion estimation