STT-MRAM Architecture with Parallel Accumulator for In-Memory Binary Neural Networks.
Thi-Nhan PhamKien Trinh QuangIk-Joon ChangMassimo AliotoPublished in: ISCAS (2021)
Keyphrases
- neural network
- design considerations
- processing elements
- associative memory
- level parallelism
- network architecture
- master slave
- parallel hardware
- distributed processing
- pattern recognition
- auto associative
- multithreading
- random access memory
- multi processor
- multi layer
- hough transform
- learning capabilities
- parallel processing
- massively parallel
- multi core processors
- neural network model
- parallel architecture
- real time
- artificial neural networks
- memory management
- shared memory
- parallel processors
- memory access
- memory footprint
- memory hierarchy
- single instruction multiple data
- computational power
- genetic algorithm
- fuzzy logic
- software architecture
- parallel implementation
- memory usage
- computing power
- processing units
- storage devices
- random access
- parallel computing
- multi threaded
- parallel programming
- instruction set
- memory space
- neural nets
- distributed memory
- operating system
- limited memory
- compute intensive
- memory bandwidth
- image processing
- memory subsystem