A 2.5Gbps Quad CMOS Transceiver Cell Using Regulated Supply Low Jitter PLL.

Vijay Khawshe Pravin V. Kumar Renu Rangnekar Kapil Vyas Kashi Prabu Mahabaleshwara Manish Jain Navin K. Mishra Abhijit Abhyankar

Published in: VLSI Design (2007)

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