On applying erroneous clock gating conditions to further cut down power.

Tak-Kei Lam Xiaoqing Yang Wai-Chung Tang Yu-Liang Wu

Published in: ASP-DAC (2011)

Keyphrases

power consumption
power reduction
clock gating
power dissipation
low power
sufficient conditions
fine grained
energy efficiency
power management
real time
pattern recognition
power saving