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On applying erroneous clock gating conditions to further cut down power.
Tak-Kei Lam
Xiaoqing Yang
Wai-Chung Tang
Yu-Liang Wu
Published in:
ASP-DAC (2011)
Keyphrases
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power consumption
power reduction
clock gating
power dissipation
low power
sufficient conditions
fine grained
energy efficiency
power management
real time
pattern recognition
power saving