Towards SMT Model Checking of Array-Based Systems.
Silvio GhilardiEnrica NicoliniSilvio RaniseDaniele ZucchelliPublished in: IJCAR (2008)
Keyphrases
- model checking
- automated verification
- temporal logic
- finite state machines
- finite state
- verification method
- formal verification
- symbolic model checking
- formal methods
- artifact centric
- temporal properties
- formal specification
- model checker
- asynchronous circuits
- reactive systems
- computation tree logic
- partial order reduction
- process algebra
- transition systems
- reachability analysis
- distributed systems
- bounded model checking
- pspace complete
- automated reasoning
- search algorithm