High-performance architecture for dynamically updatable packet classification on FPGA.
Yun Rock QuShijie ZhouViktor K. PrasannaPublished in: ANCS (2013)
Keyphrases
- pattern recognition
- real time
- support vector
- classification accuracy
- classification algorithm
- decision trees
- feature extraction
- dedicated hardware
- feature vectors
- supervised learning
- image classification
- hardware implementation
- support vector machine
- hardware architecture
- hardware design
- fpga technology
- text classification
- low cost
- management system
- training set
- training data